SM120 (Blackwell): force FlashInfer MoE, add MXFP4 weight-only GEMM, and critical SM120 fixes #9885
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… errors - Added is_sm120_supported() function to detect Blackwell GPUs (SM120) - Modified GptOssForCausalLM model_specific_adjustments to force FlashInfer MOE backend on Blackwell - Prevents Triton MOE kernel usage which causes PTX compilation errors with .tile::gather4 instructions
- Made is_sm120_supported() more precise with explicit major/minor check - Added SGLANG_DISABLE_TRITON_MOE env var support for manual override - Explicitly set all MOE-related flags when forcing FlashInfer backend - Disabled triton_kernel_moe and enabled flashinfer_mxfp4_moe/flashinfer_trtllm_moe
BREAKING: Fixes OOM issue where MXFP4 weights expanded from 15GB to 30GB Core Implementation: - Never materialize full BF16 weights (tile-wise dequantization) - Memory usage stays at ~13-16GB instead of 30GB - GPT-OSS-20b now fits on single RTX 5090 with 8K context MoE Improvements: - Proper routing with vectorized gather/scatter-add operations - Fast single-pass expert grouping for deterministic iteration - Support for multiple routing formats (indices/scores, topk_*, token_ids/expert_ids) - Batched execution with per-expert lists Memory Safety: - Hard guard against BF16 upcast on SM120+ (prevents OOM) - Override with SGLANG_MXFP4_FORCE_UPCAST=1 for debugging only - Memory usage monitoring and warnings Configuration: - Reads group_size and pack_layout from model's config.json - Environment variables can override for experiments - Caches config for efficiency Native Kernels (C++/CUDA): - Stable ABI with pybind11 wrapper - CUTLASS 3.x backend with SM120 optimizations - TileShape<128,256,64> tuned for large-N MoE - KernelTmaWarpSpecializedPingpong for Blackwell - Multi-backend support (CUTLASS/FlashInfer/Stub) Performance: - Grouped GEMM API reduces kernel launches - Multi-stream support with proper synchronization - Stream recording to prevent early memory frees - Expected ≥1.2× throughput vs BF16 path Environment Variables: - SGLANG_MXFP4_WEIGHTONLY=1 (enable weight-only path) - SGLANG_VALIDATE_GATE=1 (validate routing weights) - SGLANG_MOE_STREAMS=N (multi-stream overlap) - SGLANG_BASE_GPU_ID=N (GPU index offset support) Testing: - Numerical accuracy: max_abs < 1e-2, RMS < 3e-3 - Memory: <20GB after init, <32GB with 8K context - All routing edge cases handled This enables GPT-OSS-20b deployment on RTX 5090 without tensor parallelism.
- Fix register_buffer error (Mxfp4MoEMethod is not nn.Module) - Fix server_args.py logic block for triton_kernel checks - Fix C++ shim Wq leading dimension (use N not stride(0)) - Add stub backend guard with SGLANG_ALLOW_STUB_KERNEL - Improve fallback with in-place accumulation and K+N tiling - Add proper device handling with hasattr checks These fixes resolve the container restart loop and prevent OOM on RTX 5090
- Add dtype/contiguity checks to C++ shim (uint8, contiguous) - Fix Python fallback: add .contiguous() and make empty_cache conditional - Replace assert with RuntimeError for better error messages - Avoid empty_cache() stalls with SGLANG_DEBUG_EMPTY_CACHE=1 flag These fixes address code review feedback and prevent runtime errors
- Add handling for FlashInfer topk format with 'format' attribute - Add _is_flashinfer_topk() method to detect FlashInfer routing - Route FlashInfer format directly to trtllm_fp4_block_scale_moe - Fix TypeError when topk_output has unexpected format - Broaden FlashInfer backend detection This fixes the routing issues when using FlashInfer backend with MXFP4 models on RTX 5090.
- Add proper error handling for FlashInfer imports with try/except - Fix x_scale dtype issue: removed suspicious .view(torch.float8_e4m3fn), keep native dtype - Replace assert with warning for TopKOutputChecker.format_is_bypassed - Add comprehensive device consistency checks for all tensors - Explicit return type unpacking from trtllm_fp4_block_scale_moe - Change logging from info to debug to reduce log spam - Improve _extract_routing to raise clear error for FlashInfer format These changes make the FlashInfer routing fix more robust and production-ready.
- Fix imports: Check if trtllm_fp4_block_scale_moe and mxfp8_quantize are in globals() - Simplify device handling: Single .to() call for router_logits - Add runtime errors for missing FlashInfer components - Keep only necessary assertions (shape checks) Ready for production deployment.
…rement - Add _pad_k_to_4 helper that ensures contiguous output - Pad both w13 and w2 scale factors before shuffle operations - Use .to(torch.uint8) instead of .view(torch.uint8) for proper type conversion - Add assertions to verify K % 4 == 0 after padding (fail fast on regressions) - Ensure contiguous tensors to prevent CUDA kernel issues Works with FlashInfer's padding to handle GPT-OSS-20b (intermediate_size=2880) where scale factors need padding from K=90 to K=92.
- Convert .view(torch.uint8) to .to(torch.uint8) for proper dtype conversion - Add debug logging when K % 4 padding occurs - Ensure contiguous tensors after padding - Production hardening for MXFP4 quantization on Blackwell GPUs
- Add _parse_cuda_version() helper for safe tuple-based version comparison - Fix string comparison issue where '12.10' < '12.8' would fail - Update is_sm100_supported() to support SM120 (RTX 5090/Blackwell) - Update is_sm90_supported() with safe version comparison Fixes incorrect CUDA version comparisons that could cause issues with newer CUDA versions.
- Change from ((compute_cap == 10) or (compute_cap == 12)) to cleaner (compute_cap in (10, 12)) - More Pythonic and clearer intent - Already using safe tuple comparison for CUDA version Minor style improvement for better readability.
- Fix server_args.py syntax error (removed duplicate import os) - Fix C++ linkage: removed extern "C" with std::vector (ill-formed) - Add common header for GroupedDesc struct shared between .cpp and .cu - Add missing ATen/cuda/CUDAContext.h include for getCurrentCUDAStream - Create kernels/__init__.py to mark as Python package for imports - Clean up warning messages with arrow notation These fixes resolve build and runtime errors for MXFP4 weight-only kernels on RTX 5090.
- Fix mxfp4_grouped_cutlass.cu: removed duplicate struct, include shared header - Fix mxfp4_grouped_cutlass.cu: removed invalid extern "C" with std::vector - Add cute/tensor.hpp include for CUTLASS namespace requirements - Add CPU-only PyTorch safety: handle torch.version.cuda being None - All C++ linkage issues resolved for clean compilation These fixes ensure the build succeeds on RTX 5090 without C++ linkage errors.
- CMake: Allow CMAKE_CUDA_ARCHITECTURES override (defaults to SM120) - setup.py: Honor TORCH_CUDA_ARCH_LIST environment variable - Support building for multiple architectures in mixed clusters - Clean struct definitions with no duplication via shared header These changes make the build more flexible for different deployment scenarios.
- Derive ABI flag from PyTorch instead of hardcoding - Honor TORCH_CUDA_ARCH_LIST for flexible architecture support - Fix installation directory to use proper subdirectory - Add FlashInfer directory discovery via environment - Parse various TORCH_CUDA_ARCH_LIST formats correctly - Rename mxfp4_grouped.cu to mxfp4_grouped_impl.cu to avoid linker conflicts - Fix kUInt8 compilation error (use at::kByte only) - Remove unused variables to clean up warnings
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@webcodes-cz awesome work, - what is the exact parameters for sglang to run the gpt-oss with this PR including env? I also see that your flashinfer PR was closed because of flashinfer #1609 - does your PR still works with the latest flahinfer branch? |
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Motivation
RTX 5090 (Blackwell, SM120) reveals:
This PR:
register_bufferusage and several SM120 edge cases.Modifications
Runtime / MoE
SGLANG_DISABLE_TRITON_MOE=1, setmoe_runner_backend="flashinfer_trtllm"and disable Triton MoE._extract_routingnow returnstok/expasint64,gateas input dtype; replacesassertwith clearRuntimeErrormessages.MXFP4 weight-only path (no BF16 materialization)
w*_weightpacked (uint8 FP4) + scales and use weight-only GEMM:upcast_from_mxfpwith K×N tiling and in-place accumulation.register_bufferon non-Module; store attributes and add_to_device_for one-shot device sync.SGLANG_MOE_STREAMSwithrecord_streamguards.Config & perf hints
_load_mxfp4_cfg()reads/models/config.json(or env) forgroup_sizeandpack_layout.PYTORCH_CUDA_ALLOC_CONFonce; enable TF32 for matmul/cudnn.Native grouped kernel shim (optional)
Files under
python/sglang/srt/layers/quantization/kernels/:CMakeLists.txt,build.sh,setup.py.mxfp4_grouped.cpp/.cu(+ optionalmxfp4_grouped_cutlass.cu).Wq: [K_packed, N] ⇒ ldwq=N).SGLANG_ALLOW_STUB_KERNEL=1).Python fallback improvements
empty_cache()behindSGLANG_DEBUG_EMPTY_CACHE=1.Utilities & args
utils.is_sm120_supported()helper.server_args.pylogic fixed; supportsSGLANG_DISABLE_TRITON_MOE=1andSGLANG_BASE_GPU_ID.Accuracy Tests
No intentional numerical change vs. correct MXFP4 decode.
upcast_from_mxfp(real FP4→BF16 decode).SGLANG_MXFP4_USE_TRITON=1) and still has a placeholder line(
b = b_packed.to(tl.bfloat16) * scale) clearly marked; it’s not used by default.Suggested checks:
SGLANG_VALIDATE_GATE=1and verify per-token gate sums ≈1.SGLANG_MXFP4_FORCE_UPCAST=1), compare weight-only vs. full upcast on small shapes within BF16 tolerance.Benchmarking and Profiling
On RTX 5090:
nsys profile --stats=true python your_script.py(CUTLASS: check TMA utilization, bank conflicts).Environment Flags
SGLANG_MXFP4_WEIGHTONLY=1(default on SM120): enable weight-only path.SGLANG_MXFP4_GROUP_SIZE,SGLANG_MXFP4_PACK_LAYOUT: override config.json.SGLANG_MXFP4_USE_TRITON=1: prototype Triton path (placeholder decode; not default).SGLANG_MOE_STREAMS=<n>: enable multi-stream overlap in Python fallback.SGLANG_DISABLE_TRITON_MOE=1: force FlashInfer MoE.SGLANG_ALLOW_STUB_KERNEL=1: allow stub native kernel (zeros; build-sanity only).SGLANG_MXFP4_FORCE_UPCAST=1: allow full BF16 upcast (OOM-prone on SM120).SGLANG_BASE_GPU_ID: set default GPU id.SGLANG_DEBUG_EMPTY_CACHE=1: callempty_cache()after tiles (debug).Build (optional native backend)
CMake: